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Band-1/MMIC Development

The 35-50 GHz Band 1 receiver

ASIAA is leading a consortium which is developing the 35-50 GHz Band 1 receiver for ALMA. In addition to ASIAA, the consortium consists of the Herzberg Institute of Astrophysics (HIA), the National Radio Astronomy Observatory (NRAO), the University of Chile and the National Astronomical Observatory of Japan (NAOJ). Several Taiwanese universities also participate in this project through collaboration with ASIAA.

The band 1 receiver will nominally operate at 35-50 GHz, with a roll-off frequency range from 50-52 GHz. A diverse science motivation exists (science case paper), and we highlight the observations of low-J rotational transitions in highly redshifted galaxies, probing the evolution of the interstellar medium of galaxies; and continuum emission from protoplanetary disks due to large, cold dust grains, probing the initial stages of planet formation.

The consortium institutes each have their own technical expertise, and are developing different components for the Band 1 cartridges. A summary of the Band 1 development taking place at ASIAA is provided below.

MHEMT MMIC Low-Noise Amplifiers

Under collaboration with NTUEE and NCUEE, ASIAA developed several different MHEMT MMIC LNA designs. The 0.15 micron MHEMT MMIC foundry service is provided by a local GaAs fab in Taiwan. The goal of those different designs is to ensure that we can get the lowest cryogenic noise performance under the very limited transistor device modeling at room temperature. There are two designs from NCUEE and two designs from NTUEE with good performance. The photographs, measured scattering parameters (input/output return, small signal gain) and noise temperature of three packaged MHEMT amplifiers are shown in the figures 1, 2, and 3 below. It is worth noting that the results shown in Fig. 2 show the most successful measured noise temperature of the 3-stage MHEMT low-noise amplifier, which is with 22-37 K noise temperature under 16-K cryogenic environment, with the 12mW DC power dissipation.

The transistor device choice of the LNA design is very critical for the requirement of the cryogenic operation. In the NCUEE design, the smallest size transistor is chosen, and it leads to the small bias voltage and current, although the gain per stage is somewhat lower and the three-stage design leads to a large gain variation over the whole frequency range. This would ensure that the amplifier will not suffer from self-heating which would lead to a noise temperature degradation over long-period operation.

Figure 1. Photographs (left) and measured S-parameters (right) of the 31.3-45.0 GHz single-ended three-stage MHEMT LNA designed by NCUEE, the model number of the chip is NCUEE015. S-parameters were measured at 28K operating temperature. The bias settings are: first stage: 0.7V, 3mA, second stage: 0.7V, 5mA, and third stage: 0.8V, 8mA. Total power dissipation is 12mW.

Figure 2. Measured noise temperature of the 3-stage 30-50GHz MHEMT low noise amplifier shown in Fig. 1. The noise temperature is extracted from the cold attenuator Y-factor method. To prevent the leakage of the vacuum window dielectric on the waveguide vacuum feedthru introducing resonance and affecting the calibration accuracy, a pair of dielectric vacuum window film separated by quarter wavelength is applied to the cryogenic chamber.

31 - 50GHz GaAs PHEMT cascode mixer

This design of the cascode mixer is basically using a cascode transistor pair to form a 2-stage circuit and the first-stage transistor acts as a common-source amplifier and the second-stage transistor in cascode configuration acts as a resistive FET mixer. The innovation in this work is to introduce new methodology to implement broadband matching between two transistors. It is developed in NTUEE by using WIN Semiconductor 0.15 micron GaAs PHEMT foundry service. The probe-testing result of the chip indicates the upper-sideband conversion gain over the frequency range 1-15GHz IF frequency range is about 0dB +/- 3dB, under 4dBm LO pumping at 27-33GHz frequency range. The design and probe testing results have been published in EuMW2009 held in Rome, Italy.

The first two successful packaged mixer modules show similar conversion gain performance. However, further impedance measurement and bias point exploration show the RF and IF port impedance need some improvement. Below, Fig. 4 (upper) shows the mosaic photograph of the bottom block with chip and transition probes mounted. Fig. 4 (lower left and right) show the measured results of conversion gain frequency response.

Figure 3. Photograph (left) and measured S-parameters (right) of the 31.3-45.0 GHz MHEMT single-ended two-stage MHEMT LNA designed by NTUEE, Model number NTUEE051, under 28K operating temperature. The bias settings are: first stage: 2.0V, 15mA, second stage: 2.0V, 10mA. Total DC power dissipation is 50mW.

Figure 4. Packaged module and measured performance of the cascode PHEMT mixer, (upper) mosaicing photograph taken by microscope on the core area of the mixer block, (lower left) frequency response of the conversion gain with LO frequency fixed at 27-33GHz, (lower right) frequency response of the conversion gain with LO frequency fixed at 34-38GHz.

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